1. Technical Field
This disclosure relates to integrated circuits (ICs), and more particularly, to the delivery of clock signals to circuits undergoing scan-based testing in an IC.
2. Description of the Related Art
Scan testing is well known in the art of IC's. Scan testing may be conducted by loading test stimulus into an IC through a scan chain. A scan chain may include a number of serially-coupled storage elements (scan elements) forming what is essentially a long shift register running through the IC. After the test stimulus data has been input into the IC, it may be applied to circuits coupled to the scan elements. The circuits within the IC may respond to the stimulus, with the outputs of such circuits being captured by scan elements. Many of the circuits to which the test stimulus is applied may switch states, with much of this switching occurring in a substantially simultaneous manner. After the circuits have been allowed enough time to switch, the data may be captured by applying a clock pulse to the inputs of the various scan elements. Subsequent to capturing the data, it may be shifted from the IC and analyzed thereafter. Analysis of the captured data may include comparing the data to expected data, which may in turn reveal whether the IC undergoing test is functioning properly.